Analog to digital converters, including capacitor digital to analog converter (CDAC) which iteratively increment or decrement a sampled analog input signal are known. Generally, an analog input signal is sampled by a sample and hold circuit. The sample and hold circuit includes a capacitor which is charged to a voltage indicative of the input signal voltage. The sampled analog input signal is iteratively incremented or decremented by the CDAC for comparison to a reference voltage by a comparator. The comparator output is latched by a successive approximation register (SAR) to provide a parallel output signal which is fed back to control the CDAC.
More particularly, the CDAC comprises a plurality of switches, each one coupled in series with a corresponding capacitor and providing one bit of CDAC conversion. The SAR output is fed back to control the position of the CDAC switches which, in turn, determine whether and to what extent the sampled signal is incremented or decremented. In this way, the CDAC iteratively adjusts the voltage level of the sampled analog input signal and the comparator iteratively compares the adjusted signal voltage to the reference voltage for as many comparison cycles as there are bits comprising the CDAC. After a number of comparison cycles (corresponding to the number of CDAC bits) occur, the value of the latched parallel output signal is indicative of the amplitude of the sampled analog input signal.
It is often desirable to convert two or more analog signals into corresponding digital signals. One known technique for converting multiple analog signals into corresponding digital signals utilizes multiple sample and hold circuits and conversion circuits. That is, for each analog input signal to be converted, a sample and hold circuit and a conversion circuit including a comparator, a CDAC, and a successive approximation register (SAR) is provided. However, this arrangement disadvantageously requires duplication of components which concomitantly increases circuit size, manufacturing time, cost, and power dissipation while decreasing reliability. Additionally, use of multiple conversion circuits can cause conversion matching inaccuracies due to such factors as component tolerances and temperature variations.
An alternative approach for converting multiple analog signals is to successively process each signal utilizing a single sample and hold circuit and conversion circuit. While this approach eliminates circuit duplication, its use is precluded in certain applications in which the time relationship between two or more converted signals must be maintained. For example, this approach is not suitable for use when making quadrature measurements or instantaneous power measurements, both of which require measurement of the phase angle between two periodic signals.